IBM Demos Phase Change Memory That Reliably Packs Multiple Data Bits Into Single Cells

By Clay Dillow Posted 06.30.2011 at 1:17 pm 7 Comments

The Beginning of the End of Flash? Flash has been good to us, but IBM is making strides with phase change memory technology that could someday replace flash as the non-volatile memory of choice. DandyDanny via Flickr

IBM researchers in Zurich--working alongside their stateside colleagues--have demonstrated for the first time that phase change memory (PCM) can reliably store multiple data bits per cell over long periods of time. By tweaking their “read” and “write” processes to mitigate problems that have dogged PCM for years, the breakthrough could spell the beginning of a long, slow phase out of flash in everything from mobile devices to cloud storage.

Like flash, PCM is a non-volatile memory technology. But PCM has the potential to blow flash performance out of the water. PCM could boost overall performance of backbone IT systems by orders of magnitude. Computers could boot instantaneously. The cloud could grow at rates that might actually keep up with all the stuff we’re shoveling into the cloud.

But phase change memory isn’t the simplest nut to crack (for fuller explanations of how it works, click through the link below. Or try Wikipedia). Simply put, PCM takes advantage of the change in resistance that takes place when a material changes phases, in this case from a crystalline structure to an amorphous one. Crystalline structures exhibit high resistance and amorphous low resistance.

This range of resistance allows computer scientists to store more than one bit per memory cell, hence the huge jump in memory and performance. So in the IBM research to which we refer, scientists were able to store the bit combos “00,” “01,” “10,” and “11” in four distinct resistance levels of a single bit. It’s like a four-for-one deal.

The problem with PCM is that the resistance in the amorphous state tends to drift, rising over time and leading to read errors. That’s the real problem that was solved here: IBM’s novel read/write processes, rather than restricting resistance drift, are now coding in a drift-tolerant way. If the resistance shifts, it’s no big deal; the PCM’s long-term retention of usable, retrievable data is still solid.

This demo has been going on successfully for five months, long enough that IBM feels confident that it has a solution that really can hold data in PCM for extended periods. Of course research is ongoing, but if it proves as reliable as this first demo suggests, PCM could potentially become as ubiquitous as flash is today, doing a whole lot more with a lot less space.

[PhysOrg]

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7 Comments

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Onihikage

06/30/11 at 1:23 pm

I still have a few questions about all this. What's the ratio of cost to density, relative to how much flash cost when it was released? Does use cause wear and tear on PCM as it does on flash memory? Could there be a system that would sort of "reregister" each bit when there's a source of power, thus extending the life even further? How fast does the memory read - comparably to flash, slower, or faster?

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hessbri

06/30/11 at 2:44 pm

@onihikage: I read on another site that the cost was almost the same, and that the PCM could withstand millions of I/O actions compared to hundreds of thousands for the FLASH memory. Supposedly this stuff is 100x faster than FLASH and they want to integrate it with Intel's 50Gbps Interconnect that should be ready for market around the same time.

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masimons

06/30/11 at 3:05 pm

PCM has been really sensitive to temperature. Get that solved, run a whole rack of servers for some months then I'd be interested.

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petitroll

07/03/11 at 11:19 pm

Nitpicking here guys ... the way it described, it's only double the storage for each cell, not quadruple as the article suggested. The conventional cell store 1 bit that can either 0 or 1, the PCM as the article described, can store 2 bits than can either 00, 01, 10, or 11.

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yosifcuervo

07/04/11 at 3:02 pm

Sorry petitroll, you're looking at this like 0 and 00 are the same thing. Each cell has twice as many options, but is also holding twice as many bits, thus you quadrupling the data storage (double x double).

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yosifcuervo

07/04/11 at 3:23 pm

Or maybe that's wrong. I just wrote it down, and yes, you're clearly storing double the bits in the same space :-/

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damage75

07/17/11 at 5:59 pm

The memory density is 4 states per cell. That is 2 bits of information. It is the same as MLC SSD's and has no density advantage over that technology. As petitroll points out - it's double that of SLC, not quadruple.

The real breakthrough is with the drift correction technology.

Each cell is also said to have a 10 million r/w cycle lifetime. That is several orders of magnitude higher than SSD's! Which means no need for spare area and just tremendous reliability.

They've been working on this a really long time (more than 7 years), I can't wait to see it!

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